طراحی و پیاده سازی مقسم فرکانس 8/9 سریع و ولتاژ پایین با مدار منطقی پویا TSPC

رهنمایی, علی and محمدنیا, علیرضا and خوشنویس, فرنود and اکبری مجد, عادل (1384) طراحی و پیاده سازی مقسم فرکانس 8/9 سریع و ولتاژ پایین با مدار منطقی پویا TSPC. WSEAS Transactions on Electronics ــ 2 (4). pp. 114-118. شاپا 1109-9445

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Official URL: http://www.worldses.org/journals/electronics/old.h...


Design and improvement a high speed and low power 8/9 frequency divider with TSPC dynamic logic

English Abstract

A low power and high speed 8/9 CMOS programmable dynamic frequency divider has been designed. It contains a control bit by which can obtain 1/9 and 1/8 input frequency in output. In spite of the variations in size and structure of circuit, the 53% improvement in power dissipation has been achieved. Power dissipation about 1.6 mw in a 2.78 GHz Frequency Rate, 2.5 volt power supply circuit is verified by HSPISE simulation

Item Type:Article
زبان سند : انگلیسی
نویسنده مسئول :علی رهنمایی
نویسنده :علیرضا محمدنیا
نویسنده :فرنود خوشنویس
نویسنده :عادل اکبری مجد
Additional Information:Indexed in: Scopus, Google Scholar
کلیدواژه ها (انگلیسی):Frequency synthesizer, Frequency divider, Dynamic logic , LAN
Subjects:W Health professions > Medical Informatics , Information Systems W 26/55.I4
Divisions:Faculty of Medicine > Department of Basic Sciences > Department of Health Information Management
ID Code:12183
Deposited By: MS Soghra Golmaghani
Deposited On:20 Jun 1398 09:26
Last Modified:20 Jun 1398 09:26

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